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BUK1M200-50SGTD
Quad channel logic level TOPFET
Rev. 01 -- 31 March 2003 Product data
1. Product profile
1.1 Description
Quad temperature and overload protected power switch based on TOPFETTM Trench technology in a 20-pin surface mount plastic package. Product availability: BUK1M200-50SGTD in SOT163-1 (SO20).
1.2 Features
s s s s Power TrenchMOSTM Overtemperature protection Overload protection Input-source voltage resets latched protection circuitry. s Control of output stage and supply of overload protection circuits derived from input s s s s 5V logic compatible Current trip protection ESD protection for all pins Overvoltage clamping for turn off of inductive loads s Low operating input current permits direct drive by micro-controller.
1.3 Applications
s Low-side driver s Pulse Width Modulation s DC switching s General purpose switch for driving lamps, motors, solenoids and heaters.
1.4 Quick reference data
Table 1: Symbol RDSon ID Ptot Tj VDS
[1]
Quick reference data Parameter drain-source on-state resistance drain current total power dissipation junction temperature drain-source voltage
[1]
Min -
Max 200 2.7 9.4 150 50
Unit m A W C V
All devices active.
Philips Semiconductors
BUK1M200-50SGTD
Quad channel logic level TOPFET
2. Pinning information
dbook, halfpage
20
11 I1 D1 I2 D2 I3 D3 I4 D4
P
P
P
P
1 Top view
10
MGX361
S1
S2
S3
S4
MBL801
Fig 1. Pinning; SOT163-1 (SO20).
Fig 2. Symbol; Quad channel low-side TOPFETTM
2.1 Pin description
Table 2: Symbol n.c. D1 I1 D2 I2 D3 I3 D4 I4 S4 S3 S2 S1 Pin description Pin 1, 11, 10, 20 2,19 3 4,17 5 6,15 7 8, 13 9 12 14 16 18 Description not connected drain 1 input 1 drain 2 input 2 drain 3 input 3 drain 4 input 4 source 4 source 3 source 2 source 1
9397 750 10955
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 31 March 2003
2 of 15
Philips Semiconductors
BUK1M200-50SGTD
Quad channel logic level TOPFET
3. Block diagram
2,19 CHANNEL 1 3 I1 RIG D1 OVER VOLTAGE 18 S1 gate SHORT CIRCUIT PROTECTION OVER TEMPERATURE sense
VOLTAGE REGULATOR
CONTROL LOGIC
CROWBAR AND CURRENT TRIP 4,17 D2 16 6,15 S2
5 I2
CHANNEL 2 internal circuitry identical to CHANNEL1 CHANNEL 3 internal circuitry identical to CHANNEL1 CHANNEL 4 internal circuitry identical to CHANNEL1
7 I3
D3 14 S3 8,13
9 I4
D4 12 S4
BUK1M200-50SGTD
03pb04
Fig 3. Elements of the quad channel TOPFET switch.
9397 750 10955
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 31 March 2003
3 of 15
Philips Semiconductors
BUK1M200-50SGTD
Quad channel logic level TOPFET
4. Limiting values
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDS ID II IIMS Ptot Tstg Tj EDS(CL)S EDS(CL)R VDS(prot) IS Vesd
[1] [2] [3] [4] [5] [6] [7]
Parameter drain-source voltage drain current input current non-repetitive peak input current total power dissipation storage temperature junction temperature non-repetitive drain-source clamping energy repetitive drain-source clamping energy protected drain-source voltage source (diode forward) current electrostatic discharge voltage
Conditions
[1]
Min Max [4]
Unit V A mA mA W C mJ mJ V A kV
50 2.7 3 10 9.4 150 100 5 35 2 2
Tsp = 25 C; Figure 5 clamping tp 1 ms Tsp = 25 C; Figure 4 normal operation Tamb = 25 C; IDM ID(th)(trip); inductive load Tsp 125 C; IDM = 1 A; f = 250 Hz VIS 4 V Tsp 25 C; VIS = 0 V C = 250 pF; R = 1.5 k
[2][3]
-
-55 +150 C
[5]
Overvoltage clamping [6]
[3]
[3]
Overload protection [7] Reverse diode Electrostatic discharge
Prior to the onset of overvoltage clamping. For voltages above this value, safe operation is limited by the overvoltage clamping energy. Refer to overload protection characteristics.in Table 5. For a single active device. For all devices active. Not in an overload condition with drain current limiting. At a drain-source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients. With the protection supply provided via the input pin, the TOPFET is protected from short circuit loads. Overload protection operates by means of drain current trip or by activating the overtemperature protection.
9397 750 10955
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 31 March 2003
4 of 15
Philips Semiconductors
BUK1M200-50SGTD
Quad channel logic level TOPFET
120 Pder (%) 80
03aa17
3.00 ID (A) 2.00
03pa87
40
1.00
0 0 50 100 150 Tsp (C) 200
0.00 0 40 80 120 160 Tsp (C)
P tot P der = ---------------------- x 100% P
tot ( 25 C )
Fig 4. Normalized total power dissipation as a function of solder point temperature.
Fig 5. Continuous drain current as a function of solder point temperature.
5. Thermal characteristics
Table 4: Symbol Rth(j-sp) Thermal characteristics Parameter Conditions Min Typ Max 45 13.3 Unit K/W K/W thermal resistance from junction to mounted on thermo clad board solder point. one device active all devices active
9397 750 10955
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 31 March 2003
5 of 15
Philips Semiconductors
BUK1M200-50SGTD
Quad channel logic level TOPFET
6. Static characteristics
Table 5: Static characteristics Limits are valid for -40 C Tsp +150 C and typical values for Tsp = 25 C unless otherwise specified. Symbol VDS(CL) Parameter drain-source clamping voltage Conditions VIS = 0 V; ID = 10 mA VIS = 0 V; ID = 200 mA; tp 300 s; 0.01; Figure 18 IDSS drain-source leakage current VIS = 0 V; VDS = 40 V Tsp = 25 C; Figure 19 On-state output characteristic RDSon drain-source on-state resistance VIS 4 V; tp 300 s; 0.01; ID = 100 mA Tsp = 25 C; Figure 8 and 9 Input characteristics VIS(th) IIS
[1]
Min 50 50 0.6 1.1 100 80 1.4 0.7
[2] [3]
Typ 62 0.05 150 1.6 220 195 2 1.1 2 40 2.5
Max 70 100 10 380 200 2.4 2.1 400 330 2.5 1.5 2.5 100 8.5 -
Unit V V A A m m V V A A mA mA V s V k
Off-state output characteristics
input-source threshold voltage input supply current
VDS = 5 V; ID = 1 mA Tsp = 25 C; Figure 13 normal operation VIS = 5 V VIS = 4 V protection latched VIS = 5 V VIS = 3 V; Figure 14 and 16
VIS(rst) trst(latch) VIS(CL) RIG ID(th)(trip)
input-source reset voltage latch reset time input-source clamping voltage input-gate resistance
[5]
trst 100 s; Figure 17 II = 1.5 mA; Figure 15
1.5 10 5.5 -
[4]
Overload protection characteristic
drain current trip threshold
4 V VIS 5.5 V Tsp = 25 C; Figure 11 Figure 10 4 3 150 6.1 6.1 170 0.83 8 9 1.1 A A C V
Overtemperature protection characteristic Tj(th) VSD threshold junction temperature source-drain (diode forward) voltage 4 V VIS 5.5 V; Figure 12 IS = 2 A; VIS = 0 V; tp = 300 s Source drain diode characteristic
[1] [2] [3] [4] [5]
The supply for the logic and overload protection is taken from the input. The input voltage below which the overload protection circuits will be reset. To reset the protection circuitry from the latched state, VIS is reduced from 5 V to 1 V. Not directly measurable from device terminals. The TOPFET switches off to protect itself when one of the overload thresholds is exceeded. It remains latched off until reset by the input.
9397 750 10955
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 31 March 2003
6 of 15
Philips Semiconductors
BUK1M200-50SGTD
Quad channel logic level TOPFET
2.5 a 2
03pa71
500 RDSon (m) 375
03pa73
1.5 250 1
125 0.5
0 -50 0 50 100 T ( C) 150 j
0 0 2 4 6 VIS (V) 8
R DSon a = ----------------------------R DSon ( 25C ) Fig 6. Normalized drain-source on-state resistance factor as a function of junction temperature.
Tj = 25 C; ID = 100 mA; tp = 300 s
Fig 7. Drain-source on-state resistance as a function of input-source voltage; typical values.
6 5V ID (A) 4 4V 3.4 V
03pa89
6 ID (A)
03pa88
3.2 V
3V
4
2.8 V
2 VIS = 2.2 V
2.6 V 2.4 V
2
0 0 2 4 6 VDS (V) 8
0 0 1 2 3 VIS (V) 4
Fig 8. Output characteristics; drain current as a function of drain-source voltage; typical values.
Fig 9. Transfer characteristics; drain current as a function of input-source voltage; typical values.
9397 750 10955
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 31 March 2003
7 of 15
Philips Semiconductors
BUK1M200-50SGTD
Quad channel logic level TOPFET
9 ID(th)(trip) (A) 6
03pb 02
9 ID(th)(trip) (A) 6
03pb 01
3
3
0 -50 0 50 100 Tj (C) 150
0 0 2 4 VIS (V) 6
Tj = 25 C; tp = 300 s
Tj = 25 C; VDS = 10 V; tp = 300 s
Fig 10. Drain current trip threshold as a function of junction temperature; typical values.
Fig 11. Drain current trip threshold as a function of input-source voltage; typical values.
200 Tj(th) (C) 190
03pa76
2.5 VIS(th) (V) 2 max.
03pa77
typ. 1.5 180 min. 1
170 0.5
160 0 2 4 6 8 VIS (V) 10
0 -50 0 50 100 T ( C) 150 j
VDS = 5 V; VIS = 5 V; tp = 300 s
Tj = 25 C; VDS = 5 V; tp = 300 s
Fig 12. Overtemperature protection characteristic; threshold junction temperature as a function of input-source voltage; typical values.
Fig 13. Input-source threshold voltage as a function of junction temperature.
9397 750 10955
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 31 March 2003
8 of 15
Philips Semiconductors
BUK1M200-50SGTD
Quad channel logic level TOPFET
6 IIS (mA)
03pa91
10 II (mA) 8
03pa79
4 6
4 2
(1)
2
(2)
0 0 2 4 6 VIS (V) 8
0 0 2 4 6 V (V) IS 8
Tj = 25 C (1) Input-source current; protection latched. (2) Input-source current; normal operation.
Tj = 25 C
Fig 14. Input-source current as a function of input-source voltage; typical values.
Fig 15. Input clamping characteristic; input current as a function of input-source voltage; typical values.
2.4
(1)
03pa86
2.4 VIS(rst) (V) 2.2
03pa82
IIS (mA) 1.6
(2)
0.8
2
(3) (4)
0 -50 0 50 100 Tj (C) 150
1.8 -50 20 90 Tj (C) 160
(1) VIS = 5 V; protection latched (2) VIS = 3 V; protection latched (3) VIS = 5 V; normal operation (4) VIS = 4 V; normal operation
tr = 100 s
Fig 16. Input-source current as a function of junction temperature; typical values.
Fig 17. Input-source reset voltage as a function of junction temperature; typical values.
9397 750 10955
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 31 March 2003
9 of 15
Philips Semiconductors
BUK1M200-50SGTD
Quad channel logic level TOPFET
400 ID (mA) 300
03pa83
10-5 IDSS (A) 10-6
03pa84
200
10-7 100
0 57 59 61 63 65 67 VDS (V)
10-8 -50 0 50 100 Tj (C) 150
VIS = 0 V; tp = 300 s
VDS = 40 V; VIS = 0 V
Fig 18. Overvoltage clamping characteristic; drain current as a function of drain-source voltage; typical values.
Fig 19. Drain-source leakage current as a function of junction temperature; typical values.
9397 750 10955
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 31 March 2003
10 of 15
Philips Semiconductors
BUK1M200-50SGTD
Quad channel logic level TOPFET
7. Dynamic characteristics
Table 6: Symbol Switching td(on) tr td(off) tf turn-on delay time rise time turn-off delay time fall time RL = 50 ; ID = 250 mA; VIS = 5 V; Tsp = 25 C; Figure 20 and 21 0.5 0.7 3.2 1.6 0.9 1.5 6.5 3.5 s s s s Switching characteristics Parameter Conditions Min Typ Max Unit
td(on) tf RL VDS VDD P VIS VIS 10%
MBL853
td(off) tr
90% VDS 10%
90%
MBL854
Fig 20. Test circuit for resistive load switching times.
Fig 21. Resistive load switching waveforms.
9397 750 10955
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 31 March 2003
11 of 15
Philips Semiconductors
BUK1M200-50SGTD
Quad channel logic level TOPFET
8. Package outline
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
D
E
A X
c y HE vMA
Z 20 11
Q A2 A1 pin 1 index Lp L 1 e bp 10 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 13.0 12.6 0.51 0.49 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
0.9 0.4 0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.055 0.394 0.016
8o 0o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT163-1 REFERENCES IEC 075E04 JEDEC MS-013 EIAJ EUROPEAN PROJECTION
ISSUE DATE 97-05-22 99-12-27
Fig 22.
9397 750 10955 (c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 31 March 2003
12 of 15
Philips Semiconductors
BUK1M200-50SGTD
Quad channel logic level TOPFET
9. Revision history
Table 7: Rev Date 01 20030331 Revision history CPCN Description Product data (9397 750 10955)
9397 750 10955
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 31 March 2003
13 of 15
Philips Semiconductors
BUK1M200-50SGTD
Quad channel logic level TOPFET
10. Data sheet status
Level I II Data sheet status[1] Objective data Preliminary data Product status[2][3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
III
Product data
Production
[1] [2] [3]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
11. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
13. Trademarks
TOPFET -- is a trademark of Koninklijke Philips Electronics N.V. TrenchMOS -- is a trademark of Koninklijke Philips Electronics N.V.
12. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors
Contact information
For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.
9397 750 10955
Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 31 March 2003
14 of 15
Philips Semiconductors
BUK1M200-50SGTD
Quad channel logic level TOPFET
Contents
1 1.1 1.2 1.3 1.4 2 2.1 3 4 5 6 7 8 9 10 11 12 13 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Thermal characteristics. . . . . . . . . . . . . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 14 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
(c) Koninklijke Philips Electronics N.V. 2003. Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 31 March 2003 Document order number: 9397 750 10955

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